The present disclosure relates generally to semiconductor devices, and more specifically to isolation structures for semiconductor devices such as radio frequency (RF) devices.
Wireless communications use an antenna to transmit and receive electromagnetic (EM) signals. The antenna is typically driven by an integrated circuit (IC) or other discrete device. This IC or driver chip may be configured within a package on a printed circuit (PC) board, for example, along with other circuitry. The EM signal from the driver chip reaches the antenna via internal wiring or other metallization.
There is an increasing demand for compact radio communications systems having integrated transmitter, receiver, transceiver and antenna systems, which enable high data transmission rates, high volume, low power consumption, low weight, and low cost. As operating frequencies increase, however, the manufacture and assembly of such systems becomes increasingly difficult due to the requirements for isolation and scaling.
Radio frequency devices, including devices operating at 10 GHz and greater, are beneficially integrated directly onto a semiconductor substrate such as a silicon or silicon germanium substrate. In such RF devices, through-substrate vias (TSVs) may be used as an alternative to wire-bond and flip chip technologies to create 3D packages and 3D integrated circuits.
As will be appreciated, high resistivity substrates (>1000 ohm-cm) that enable improved RF performance are susceptible to large depletion regions at typical well biases. To prevent leakage currents from flowing from a device to a through-substrate via (TSV), for example, it has been shown that spacing ground rules greater than the depletion region itself are required, which is adverse to technology scaling requirements.
Notwithstanding recent advances, the development of chip architectures that provide adequate isolation while satisfying next-generation device-to-TSV spacing ground rule requirements would be beneficial.